Reference
Register reference
All 17 registers used by the seven missions, with addresses and bit tables.
On this page
Register map
| Address | Register | Used in |
|---|---|---|
| 0x20 | OSCCON | All levels |
| 0x21 | TRISA | Level 1 |
| 0x22 | PORTA | Level 1 |
| 0x23 | TRISB | Level 1 |
| 0x24 | PORTB | Level 1 |
| 0x25 | ADCON0 | Level 2 |
| 0x26 | ADCON1 | Level 2 |
| 0x27 | T0CON | Level 3 |
| 0x28 | T1CON | Level 3 |
| 0x29 | EECON0 | Level 4 |
| 0x2A | EECON1 | Level 4 |
| 0x2B | TXSTA | Level 5 |
| 0x2C | RCSTA | Level 5 |
| 0x2D | SSPCON0 | Level 6 |
| 0x2E | SSPCON1 | Level 6 |
| 0x2F | I2CCON0 | Level 7 |
| 0x30 | I2CCON1 | Level 7 |
Note
OSCCON is required by every level and must be 0x05. Bits marked “not used” are not needed for the win value and should be left at 0.
17 of 17 registers
OSCCON 0x20
Used in level 1Used in level 2Used in level 3Used in level 4Used in level 5Used in level 6Used in level 7
| Bit(s) | Field | When 1 / value meaning | When 0 |
|---|---|---|---|
| 7:3 | — | Not used (leave 0) | |
| 2:1 | IRCF1:IRCF0 | 00 = 1 MHz01 = 2 MHz10 = 4 MHz11 = 8 MHz | |
| 0 | SCS0 | 1 = Internal oscillator on | 0 = Internal oscillator not enabled |
TRISA 0x21
| Bit(s) | Field | When 1 / value meaning | When 0 |
|---|---|---|---|
| 7:0 | RA7…RA0 | 1 = RAn is an input | 0 = RAn is an output |
PORTA 0x22
| Bit(s) | Field | When 1 / value meaning | When 0 |
|---|---|---|---|
| 7:0 | RA7…RA0 | 1 = RAn drives 5 V (needs TRISA bit n = 0) | 0 = RAn does not drive 5 V (an input pin reads the outside level) |
TRISB 0x23
| Bit(s) | Field | When 1 / value meaning | When 0 |
|---|---|---|---|
| 7:0 | RB7…RB0 | 1 = RBn is an input | 0 = RBn is an output |
PORTB 0x24
| Bit(s) | Field | When 1 / value meaning | When 0 |
|---|---|---|---|
| 7:0 | RB7…RB0 | 1 = RBn drives 5 V (needs TRISB bit n = 0) | 0 = RBn does not drive 5 V (an input pin reads the outside level) |
ADCON0 0x25
| Bit(s) | Field | When 1 / value meaning | When 0 |
|---|---|---|---|
| 7:6 | ADCS1:ADCS0 | 00 = Conversion clock = Fosc/401 = Conversion clock = Fosc/1610 = Conversion clock = Fosc/3211 = Conversion clock = Fosc/64 | |
| 5 | — | Not used (leave 0) | |
| 4:2 | CHS2:CHS0 | 000 = Channel AN0001 = Channel AN1010 = Channel AN2011 = Channel AN3100 = Channel AN4101 = Channel AN5110 = Channel AN6111 = Channel AN7 | |
| 1 | GO/DONE | Conversion GO/DONE bit: not part of the win value (leave 0) | |
| 0 | ADON | 1 = Converter on | 0 = Converter off |
ADCON1 0x26
| Bit(s) | Field | When 1 / value meaning | When 0 |
|---|---|---|---|
| 7:6 | ADCS1:ADCS0 | 00 = Conversion clock = Fosc/401 = Conversion clock = Fosc/1610 = Conversion clock = Fosc/3211 = Conversion clock = Fosc/64 | |
| 5 | — | Not used (leave 0) | |
| 4:2 | CHS2:CHS0 | 000 = Channel AN0001 = Channel AN1010 = Channel AN2011 = Channel AN3100 = Channel AN4101 = Channel AN5110 = Channel AN6111 = Channel AN7 | |
| 1 | GO/DONE | Conversion GO/DONE bit: not part of the win value (leave 0) | |
| 0 | ADON | 1 = Converter on | 0 = Converter off |
T0CON 0x27
| Bit(s) | Field | When 1 / value meaning | When 0 |
|---|---|---|---|
| 7:6 | — | Not used (leave 0) | |
| 5:4 | T0PS1:T0PS0 | 00 = Prescaler 1:1601 = Prescaler 1:810 = Prescaler 1:411 = Prescaler 1:2 | |
| 3 | PSA | 1 = Prescaler NOT assigned (timer runs at the full clock) | 0 = Prescaler ASSIGNED (inverted: 0 = assigned) |
| 2 | T0SE | Selects the increment edge: not part of the win value (leave 0) | |
| 1 | T08BIT | 1 = 8-bit mode | 0 = 16-bit mode |
| 0 | TMR0ON | 1 = Timer on | 0 = Timer off |
T1CON 0x28
| Bit(s) | Field | When 1 / value meaning | When 0 |
|---|---|---|---|
| 7:6 | — | Not used (leave 0) | |
| 5:4 | T1PS1:T1PS0 | 00 = Prescaler 1:1601 = Prescaler 1:810 = Prescaler 1:411 = Prescaler 1:2 | |
| 3 | PSA | 1 = Prescaler NOT assigned (timer runs at the full clock) | 0 = Prescaler ASSIGNED (inverted: 0 = assigned) |
| 2 | T1SE | Selects the increment edge: not part of the win value (leave 0) | |
| 1 | T18BIT | 1 = 8-bit mode | 0 = 16-bit mode |
| 0 | TMR1ON | 1 = Timer on | 0 = Timer off |
EECON0 0x29
| Bit(s) | Field | When 1 / value meaning | When 0 |
|---|---|---|---|
| 7:3 | — | Not used (leave 0) | |
| 2 | WR | 1 = Initiate a write | 0 = No write initiated |
| 1 | RD | 1 = Initiate a read | 0 = No read initiated |
| 0 | EEPGD | 1 = Access flash program memory | 0 = Access EEPROM data memory |
EECON1 0x2A
| Bit(s) | Field | When 1 / value meaning | When 0 |
|---|---|---|---|
| 7:3 | — | Not used (leave 0) | |
| 2 | WR | 1 = Initiate a write | 0 = No write initiated |
| 1 | RD | 1 = Initiate a read | 0 = No read initiated |
| 0 | EEPGD | 1 = Access flash program memory | 0 = Access EEPROM data memory |
TXSTA 0x2B
| Bit(s) | Field | When 1 / value meaning | When 0 |
|---|---|---|---|
| 7:5 | — | Not used (leave 0) | |
| 4 | TX9 | 9-bit transmit bit: not part of the win value (leave 0) | |
| 3 | BRGH | BRGH bit: not part of the win value (leave 0) | |
| 2 | SYNC | SYNC bit: not part of the win value (leave 0) | |
| 1 | TXEN | 1 = Transmitter enabled | 0 = Transmitter disabled |
| 0 | SPEN | 1 = Serial port enabled | 0 = Serial port disabled |
RCSTA 0x2C
| Bit(s) | Field | When 1 / value meaning | When 0 |
|---|---|---|---|
| 7:5 | — | Not used (leave 0) | |
| 4 | RX9 | 9-bit receive bit: not part of the win value (leave 0) | |
| 3 | BRGH | BRGH bit: not part of the win value (leave 0) | |
| 2 | SYNC | SYNC bit: not part of the win value (leave 0) | |
| 1 | CREN | 1 = Receiver enabled | 0 = Receiver disabled |
| 0 | SPEN | 1 = Serial port enabled | 0 = Serial port disabled |
SSPCON0 0x2D
| Bit(s) | Field | When 1 / value meaning | When 0 |
|---|---|---|---|
| 7:5 | — | Not used (leave 0) | |
| 4 | CKE | Transmit edge: not part of the win value (leave 0) | |
| 3 | CKP | Clock idle level: not part of the win value (leave 0) | |
| 2:1 | SSPM1:SSPM0 | 00 = SPI Slave, Fosc/401 = SPI Slave, Fosc/1610 = SPI Master, Fosc/411 = SPI Master, Fosc/16 | |
| 0 | SPEN | 1 = Serial port enabled | 0 = Serial port disabled |
SSPCON1 0x2E
| Bit(s) | Field | When 1 / value meaning | When 0 |
|---|---|---|---|
| 7:5 | — | Not used (leave 0) | |
| 4 | CKE | Transmit edge: not part of the win value (leave 0) | |
| 3 | CKP | Clock idle level: not part of the win value (leave 0) | |
| 2:1 | SSPM1:SSPM0 | 00 = SPI Slave, Fosc/401 = SPI Slave, Fosc/1610 = SPI Master, Fosc/411 = SPI Master, Fosc/16 | |
| 0 | SPEN | 1 = Serial port enabled | 0 = Serial port disabled |
I2CCON0 0x2F
| Bit(s) | Field | When 1 / value meaning | When 0 |
|---|---|---|---|
| 7:5 | — | Not used (leave 0) | |
| 4 | CKE | Transmit edge: not part of the win value (leave 0) | |
| 3 | CKP | Clock idle level: not part of the win value (leave 0) | |
| 2:1 | SSPM1:SSPM0 | 00 = I²C Slave, 10-bit, Fosc/401 = I²C Slave, 7-bit, Fosc/1610 = I²C Master, 10-bit, Fosc/411 = I²C Master, 7-bit, Fosc/16 | |
| 0 | SPEN | 1 = Serial port enabled | 0 = Serial port disabled |
I2CCON1 0x30
| Bit(s) | Field | When 1 / value meaning | When 0 |
|---|---|---|---|
| 7:5 | — | Not used (leave 0) | |
| 4 | CKE | Transmit edge: not part of the win value (leave 0) | |
| 3 | CKP | Clock idle level: not part of the win value (leave 0) | |
| 2:1 | SSPM1:SSPM0 | 00 = I²C Slave, 10-bit, Fosc/401 = I²C Slave, 7-bit, Fosc/1610 = I²C Master, 10-bit, Fosc/411 = I²C Master, 7-bit, Fosc/16 | |
| 0 | SPEN | 1 = Serial port enabled | 0 = Serial port disabled |