Mission 04 / 07
FlashBack Fighter
The ship forgot its mission. Make it remember.
On this page
01The situation
Mid-flight, the memory failed: flight paths, calibration, the whole mission record. Write it back somewhere a power cut can't erase it.
02Why this matters
RAM forgets everything when the power goes. EEPROM doesn't, so it's where every device keeps what must survive a restart.
- Wi-Fi settingsYour router still knows its password after a power cut.
- CalibrationSensors store their correction values once, at the factory.
- Saved stateLast volume, last channel, high scores.
03The idea in one picture
Think of it as: RAM is a whiteboard that's wiped when the lights go out; EEPROM is a notebook. EEPGD picks the notebook (EEPROM) or the ship's printed manual (flash), and RD / WR say whether you read a page or write one.
04Your mission
- OSCCONStart the clock. Any speed works.
- EECON0Point at EEPROM and start a write.
- EECON1Point at EEPROM and start a read.
Hint 1
Hint 2
0 means EEPROM. RD is bit 1 and WR is bit 2. Set only the one action each register needs.Show the solution
- 1Step 1 — OSCCON (0x20)Set it to
0x05(0000 0101). Switch the internal oscillator on at 4 MHz (any speed wins). - 2Step 2 — EECON0 (0x29)Set it to
0x04(0000 0100). Select EEPROM (not program memory) and initiate a write. - 3Step 3 — EECON1 (0x2A)Set it to
0x02(0000 0010). Select EEPROM (not program memory) and initiate a read. - 4Program & ExecutePress P to compile your configuration into machine code in ROM, then press E to run it. When every register matches you get Target Reached.
The same thing as a program (MOVLW loads a value into W, MOVWF copies W into a register):
MOVLW 0x05
MOVWF 0x20 ; OSCCONMOVLW 0x04
MOVWF 0x29 ; EECON0MOVLW 0x02
MOVWF 0x2A ; EECON1Bit-by-bit breakdown
OSCCON0x20= 0x05
Switch the internal oscillator on at 4 MHz (any speed wins). 0x05 = 0000 0101 = SCS0 = 1, IRCF = 10
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|
| Value | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
| Field | — | IRCF | SCS0 | |||||
- IRCF (bits 2:1) =
10→ 4 MHz - SCS0 (bit 0) =
1→ Internal oscillator on - Every remaining bit is
0: those bits are not needed for this level, but they must stay clear for the value to match.
EECON00x29= 0x04
Select EEPROM (not program memory) and initiate a write. 0x04 = 0000 0100 = EEPGD = 0, RD = 0, WR = 1
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|
| Value | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
| Field | — | WR | RD | EEPGD | ||||
- WR (bit 2) =
1→ Initiate a write - RD (bit 1) =
0→ No read initiated - EEPGD (bit 0) =
0→ Access EEPROM data memory - Every remaining bit is
0: those bits are not needed for this level, but they must stay clear for the value to match.
EECON10x2A= 0x02
Select EEPROM (not program memory) and initiate a read. 0x02 = 0000 0010 = EEPGD = 0, RD = 1, WR = 0
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|
| Value | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |
| Field | — | WR | RD | EEPGD | ||||
- WR (bit 2) =
0→ No write initiated - RD (bit 1) =
1→ Initiate a read - EEPGD (bit 0) =
0→ Access EEPROM data memory - Every remaining bit is
0: those bits are not needed for this level, but they must stay clear for the value to match.
Try it: build the values
Flip the bits until each register matches the mission. It's practice only; nothing is saved.
0 of 3 registers match.
OSCCON 0x20
✗ Not yet – 2 bits differHex 0x00 Binary 0000 0000 Target 0x05 (0000 0101)
- IRCF (bits 2:1) = 00 → 1 MHz
- SCS0 (bit 0) = 0 → Internal oscillator not enabled
EECON0 0x29
✗ Not yet – 1 bit differHex 0x00 Binary 0000 0000 Target 0x04 (0000 0100)
- WR (bit 2) = 0 → No write initiated
- RD (bit 1) = 0 → No read initiated
- EEPGD (bit 0) = 0 → Access EEPROM data memory
EECON1 0x2A
✗ Not yet – 1 bit differHex 0x00 Binary 0000 0000 Target 0x02 (0000 0010)
- WR (bit 2) = 0 → No write initiated
- RD (bit 1) = 0 → No read initiated
- EEPGD (bit 0) = 0 → Access EEPROM data memory
05How you know it worked
- 1Write: address, then dataFor each character the address appears, then the byte travels into its EEPROM cell.Screenshot coming soon
- 2Read it straight backRight after each write, the same cell is read back to the read block.Screenshot coming soon
- 3The message is restored"EmbeddedPlayX" sits in memory from address 0x00 up, and WR and RD clear themselves.TARGET REACHEDScreenshot coming soon
Stuck?
- Nothing is ever writtenWR belongs in EECON0 (
0x04). Check the two values aren't swapped. - It never starts, even with WR setThe write waits for the read-back: EECON1 needs RD (
0x02). - Data goes to the wrong memoryEEPGD = 1 selects flash. Keep bit 0 at 0.
- It runs, but no Target ReachedOne action per register:
0x06sets both RD and WR.
06Debrief
You just made the ship remember.
Every product with settings uses non-volatile memory. Real firmware also waits for each write to finish before starting the next, because EEPROM writes are slow.
// the same idea in CEECON0 = 0x04; // EEPROM, start a writeEECON1 = 0x02; // EEPROM, start a readOn a real chip the same switches can sit at different bit positions; its datasheet has the map. The idea is identical.